Non-Parametric Stochastic Autoencoder Model for Anomaly Detection

Anomaly detection is a widely studied field in computer science with applications ranging from intrusion detection, fraud detection, medical diagnosis and quality assurance in manufacturing. The underlying premise is that an anomaly is an observation that does not conform to what is considered to be normal. This study addresses two major problems in the field. First, anomalies are defined in a local context, that is, being able to give quantitative measures as to how anomalies are categorized within its own problem domain and cannot be generalized to other domains. Commonly, anomalies are measured according to statistical probabilities relative to the entire dataset with several assumptions such as type of distribution and volume. Second, the performance of a model is dependent on the problem itself. As a machine learning problem, each model has to have parameters optimized to achieve acceptable performance specifically thresholds that are either defined by domain experts of manually adjusted. This study attempts to address these problems by providing a contextual approach to measuring anomaly detection datasets themselves through a quantitative approach called categorical measures that provides constraints to the problem of anomaly detection and proposes a robust model based on autoencoder neural networks whose parameters are dynamically adjusted in order to avoid parameter tweaking on the inferencing stage. Empirically, the study has conducted a relatively exhaustive experiment against existing and state of the art anomaly detection models in a semi-supervised learning approach where the assumption is that only normal data is available to provide insight as to how well the model performs under certain quantifiable anomaly detection scenarios

Extending the Teknomo-Fernandez Background Image Generation Algorithm on the HSV Colour Space

Background subtraction, a procedure required in many video analysis applications such as object tracking , is dependent on the model background image. One efficient algorithm for background image generation is the Teknomo-Fernandez (TF) Algorithm, which uses modal values and a tournament-like strategy to produce a good background image very quickly. A previous study showed that the TF algorithm can be extended from the original 3 frames per tournament (T F 3) to T F 5 and T F 7, resulting in increased accuracies at a cost of increased processing times. In this study, we explore extending the T F 3, T F 5 and T F 7 from the original RGB colour space to the HSV colour space. A ground truth model background image for HSV was also developed for comparing the performances between the TF implementations on the RGB and HSV channels. The results show that the TF algorithm generates accurate background images when implemented on the HSV colour space. However, the RGB implementations still exhibit higher accuracies than the corresponding HSV implementations. Finally, background subtraction was applied on the HSV generated background images. A comparison with other promising baseline techniques validates the competitiveness of the TF algorithm implemented on HSV channels

Non-invasive Diabetes Detection using Gabor Filter: A Comparative Analysis of Different Cameras

This paper compares and explores the performance of both mobile device camera and laptop camera as convenient tool for capturing images for non-invasive detection of Diabetes Mellitus (DM) using facial block texture features. Participants within age bracket 20 to 79 years old were chosen for the dataset. 12mp and 7mp mobile cameras, and a laptop camera were used to take the photo under normal lighting condition. Extracted facial blocks were classified using k-Nearest Neighbors (k-NN) and Support Vector Machine (SVM). 100 images were captured, preprocessed, filtered using Gabor, and iterated. Performance of the system was measured in terms of accuracy, specificity, and sensitivity. Best performance of 96.7% accuracy, 100% sensitivity, and 93% specificity were achieved from 12mp back camera using SVM with 100 images.Comment: 11 pages, 5 figures, 3 tables, conferenc

Construction of a Repeatable Framework for Prostate Cancer Lesion Binary Semantic Segmentation using Convolutional Neural Networks

Prostate cancer is the 3rd most diagnosed cancer overall. Current screening methods such as the prostate-specific antigen test could result in overdiagonosis and overtreatment while other methods such as a transrectal ultrasonography are invasive. Recent medical advancements have allowed the use of multiparametric MRI — a noninvasive and reliable screening process for prostate cancer. However, assessment would still vary from different professionals introducing subjectivity. While con-volutional neural network has been used in multiple studies to ob-jectively segment prostate lesions, due to the sensitivity of datasets and varying ground-truth established used in these studies, it is not possible to reproduce and validate the results. In this study, we executed a repeatable framework for segmenting prostate cancer lesions using annotated apparent diffusion coefficient maps from the QIN-PROSTATE-Repeatability dataset — a publicly available dataset that includes multiparametric MRI images of 15 patients that are confirmed or suspected of prostate cancer with two studies each. We used a main architecture of U-Net with batch normalization tested with different encoders, varying data image augmentation combinations, and hyperparameters adopted from various published frameworks to validate which combination of parameters work best for this dataset. The best performing framework was able to achieve a Dice score of 0.47 (0.44-0.49) which is comparable to previously published studies. The results from this study can be objectively compared and improved with further studies whereas this was previously not possible

VLSI Implementation of an Efficient Lossless EEG Compression Design for Wireless Body Area Network

Data transmission of electroencephalography (EEG) signals over Wireless Body Area Network (WBAN) is currently a widely used system that comes together with challenges in terms of efficiency and effectivity. In this study, an effective Very-Large-Scale Integration (VLSI) circuit design of lossless EEG compression circuit is proposed to increase both efficiency and effectivity of EEG signal transmission over WBAN. The proposed design was realized based on a novel lossless compression algorithm which consists of an adaptive fuzzy predictor, a voting-based scheme and a tri-stage entropy encoder. The tri-stage entropy encoder is composed of a two-stage Huffman and Golomb-Rice encoders with static coding table using basic comparator and multiplexer components. A pipelining technique was incorporated to enhance the performance of the proposed design. The proposed design was fabricated using a 0.18 μm CMOS technology containing 8405 gates with 2.58 mW simulated power consumption under an operating condition of 100 MHz clock speed. The CHB-MIT Scalp EEG Database was used to test the performance of the proposed technique in terms of compression rate which yielded an average value of 2.35 for 23 channels. Compared with previously proposed hardware-oriented lossless EEG compression designs, this work provided a 14.6% increase in compression rate with a 37.3% reduction in hardware cost while maintaining a low system complexity

Efficient and Accurate CORDIC Pipelined Architecture Chip Design Based on Binomial Approximation for Biped Robot

Recently, much research has focused on the design of biped robots with stable and smooth walking ability, identical to human beings, and thus, in the coming years, biped robots will accomplish rescue or exploration tasks in challenging environments. To achieve this goal, one of the important problems is to design a chip for real-time calculation of moving length and rotation angle of the biped robot. This paper presents an efficient and accurate coordinate rotation digital computer (CORDIC)-based efficient chip design to calculate the moving length and rotation angle for each step of the biped robot. In a previous work, the hardware cost of the accurate CORDIC-based algorithm of biped robots was primarily limited by the scale-factor architecture. To solve this problem, a binomial approximation was carefully employed for computing the scale-factor. In doing so, the CORDIC-based architecture can achieve similar accuracy but with fewer iterations, thus reducing hardware cost. Hence, incorporating CORDIC-based architecture with binomial approximation, pipelined architecture, and hardware sharing machines, this paper proposes a novel efficient and accurate CORDIC-based chip design by using an iterative pipelining architecture for biped robots. In this design, only low-complexity shift and add operators were used for realizing efficient hardware architecture and achieving the real-time computation of lengths and angles for biped robots. Compared with current designs, this work reduced hardware cost by 7.2%, decreased average errors by 94.5%, and improved average executing performance by 31.5%, when computing ten angles of biped robots

A High-Accuracy and Power-Efficient Self-Optimizing Wireless Water Level Monitoring IoT Device for Smart City

In this paper; a novel self-optimizing water level monitoring methodology is proposed for smart city applications. Considering system maintenance; the efficiency of power consumption and accuracy will be important for Internet of Things (IoT) devices and systems. A multi-step measurement mechanism and power self-charging process are proposed in this study for improving the efficiency of a device for water level monitoring applications. The proposed methodology improved accuracy by 0.16–0.39% by moving the sensor to estimate the distance relative to different locations. Additional power is generated by executing a multi-step measurement while the power self-optimizing process used dynamically adjusts the settings to balance the current of charging and discharging. The battery level can efficiently go over 50% in a stable charging simulation. These methodologies were successfully implemented using an embedded control device; an ultrasonic sensor module; a LORA transmission module; and a stepper motor. According to the experimental results; the proposed multi-step methodology has the benefits of high accuracy and efficient power consumption for water level monitoring applications

Real-time Monitoring of the Semiconductor Wirebond Interconnection Process for Production Yield and Quality Improvement

The electronics industry in the Philippine is the largest contributor to the manufacturing sector within the country. The Philippines is also considered the fastest growing economy in the region where its electronics products are among its top exports. The manufacturing of new electronics devices that comes with the emerging technologies translate to new processes that require new equipment that poses challenges to the industry. Thus, innovative solutions are developed by the engineers to improve and increase the production yield. This study presents the development of a monitoring system that is interfaced to an existing wirebonding machine as a means of improving production yield. The system detects and records the bouncing of the “area under bond” which is identified as a major cause of product rejection. The Arduino-based microcontroller takes the U/SG (Ultrasonic Generator/Gain) signals from the machine. The Raspberry pi monitors the real-time signal provided by the microcontroller and compares the signal from the database module with trained signals. Tests run show that the system can detect the signals and present it in a “.csv” file format. Twenty (20) units of a specific electronic device were tested to identify between good and defective device

VLSI Implementation of a Cost-Efficient Loeffler-DCT Algorithm with Recursive CORDIC for DCT-Based Encoder

This paper presents a low-cost and high-quality; hardware-oriented; two-dimensional discrete cosine transform (2-D DCT) signal analyzer for image and video encoders. In order to reduce memory requirement and improve image quality; a novel Loeffler DCT based on a coordinate rotation digital computer (CORDIC) technique is proposed. In addition; the proposed algorithm is realized by a recursive CORDIC architecture instead of an unfolded CORDIC architecture with approximated scale factors. In the proposed design; a fully pipelined architecture is developed to efficiently increase operating frequency and throughput; and scale factors are implemented by using four hardware-sharing machines for complexity reduction. Thus; the computational complexity can be decreased significantly with only 0.01 dB loss deviated from the optimal image quality of the Loeffler DCT. Experimental results show that the proposed 2-D DCT spectral analyzer not only achieved a superior average peak signal–noise ratio (PSNR) compared to the previous CORDIC-DCT algorithms but also designed cost-efficient architecture for very large scale integration (VLSI) implementation. The proposed design was realized using a UMC 0.18-μm CMOS process with a synthesized gate count of 8.04 k and core area of 75,100 μm2. Its operating frequency was 100 MHz and power consumption was 4.17 mW. Moreover; this work had at least a 64.1% gate count reduction and saved at least 22.5% in power consumption compared to previous designs

A Low-Power Passive UHF Tag With High-Precision Temperature Sensor for Human Body Application

Radio frequency identification (RFID) tags are widely used in various electronic devices due to their low cost, simple structure, and convenient data reading. This topic aims to study the key technologies of ultra-high frequency (UHF) RFID tags and high-precision temperature sensors, and how to reduce the power consumption of the temperature sensor and the overall circuits while maintaining minimal loss of performance. Combined with the biomedicine, an innovative high-precision human UHF RFID chip for body temperature monitoring is designed. In this study, a ring oscillator whose output frequency is linearly related to temperature is designed and proposed as a temperature-sensing circuit by innovatively combining auxiliary calibration technology. Then, a binary counter is used to count the pulses, and the temperature is ultimately calculated. This topic designed a relaxation oscillator independent of voltage and current. The various types of resistors were used to offset the temperature deviation. A current mirror array calibration circuit is used to calibrate the process corner deviation of the clock circuit with a self-calibration algorithm. This study mainly contributes to reducing power consumption and improving accuracy. The total power consumption of the RF/analog front-end and temperature sensor is 7.65µW. The measurement error of the temperature sensor in the range of 0 to 60◦C is less than ±0.1%, and the accuracy of the output frequency of the clock circuit is ±2.5%